Patterns created using advanced fault models provide higher test coverage, improved defect detection, and higher-yielding ...

The semiconductor industry has long relied on scan ATPG (automatic test pattern generation) tools instead of functional test to create stimulus-response patterns with very high fault coverage. But ...

There is a rapidly growing interest in the use of structural techniques for testing random logic. In particular, much has been published on new techniques for on-chip compression of automatic test ...

New semiconductor technologies like FinFETs are giving rise to new types of fault effects not covered by standard stuck-at and at-speed tests. Automatic test pattern generation (ATPG) tools perform ...

When semiconductor devices had geometries of 0.18 microns and larger, most defects manifested themselves as static faults. Test strategies based on stuck-at fault-model scan patterns and standard ...